1. Field of the Invention
This invention relates to microprocessor systems, particularly those systems utilizing coprocessors at different clocking frequencies.
2. Prior Art
A fundamental problem exists when a microprocessor and a synchronous coprocessor, each having a different maximum allowable operating frequency, are utilized in the same system. Since the two processors must operate synchronously, they must be run at the same frequency. Thus, in the prior art, the maximum operating frequency of the system is limited to the maximum allowable frequency of the slower processor. The processor with the higher allowable operating frequency has to operate at only a percentage of its theoretical performance capability. For example, there are systems which utilize an 8087-3 numeric data processor and an 8086-1 microprocessor. The 8087-3 has a maximum allowable operating frequency 5 MHz, while the 8086-1 has a 10 MHz maximum frequency. Because the 8087-3 must operate synchronously with the 8087-1 by tracking its instruction flow, both processors must run at the coprocessor's maximum frequency of 5 MHz, which sacrifices much of the potential performance of the 8086-1. As a result, the efficiency of the system is greatly lowered since all functions will be performed at a slower rate.
As will be seen, the present invention relates to a method and apparatus for a system utilizing a microprocessor having a faster maximum operating frequency and a numeric data processor having a slower maximum operating frequency which runs the system at the lower clocking frequency only during those times when both the microprocessor and the numeric data processor are required to perform processing functions and runs the system at the higher clocking frequency when only the microprocessor is required. Therefore the method and apparatus of the invention provides greater operating efficiency for the microprocessor, while not sacrificing the interface capabilities of the numeric data processor.